The present invention relates to a differential physical layer device with testing.
The physical layer, or PHY, is the heart of any advanced, serial interconnect standard. Very different peripherals often share similar requirements at the PHY level. One standard organization called the MIPI Alliance (MIPI) developed a differential physical (D-PHY) specification as a re-usable physical layer solution upon which MIPI camera interfaces, display panel interfaces, and general-purpose high-speed/low-power interfaces could be based. This helped streamline the development of multiple standards in MIPI, but also benefits the companies implementing these interfaces in semiconductor products, since much of the PHY engineering investment can be re-used on subsequent designs.
The MIPI D-PHY is a low-power, differential signaling solution with a dedicated clock lane and one or more (scalable) data lanes. MIPI D-PHY delivers up to 2.5 Gbps per lane via an advanced source-synchronous, differential SLVS design which is scalable to the number of lanes required by the application—data lanes can optionally operate bidirectionally as needed. It meets the demanding requirements of low-power, low-noise-generation, and high-noise immunity which mobile phone designs demand.
Traditional D-PHY implementation that can support at-speed production test uses the Universal Lane configuration. However, the D-PHY Universal Lane configuration supports testability at the expense of large overhead. The D-PHY universal Lane, shown in FIG. 1, has many blocks connected to the high-speed serial interface (LPTX, HSTX, LPRX, HSRX, LP-CD) resulting in high parasitic cap, not only due to block input capacitance but also due to parasitic interconnect capacitance. This puts an artificial upper limit on data rate.
A D-PHY RX application would require inclusion of both the HS & LP TX in each of the data lanes in addition to the clock lane. This results in a considerable amount of overhead in RX applications, since D-PHY HS and LP TX are significantly larger than the corresponding RX only configuration.
As MIPI expands beyond the traditional mobile platform into safety sensitive applications, such as automotive and medical applications, full-speed, in-system testability and diagnostics are becoming of paramount importance. In safety sensitive applications, cost and risk grow even faster, and the implications of a failing part are intolerable. As electronic component contents rapidly grows in those applications, the cost of failure increases substantially, and detection of any degradation in performance as early as possible is highly desirable. Full-speed production testing enables detection of manufacturing faults and helps drive down the number of defects to zero, as required in safety sensitive applications such as in the automotive industry.